Sanjay Sriram

Sanjay Sriram

Hi, I'm Sanjay, a student researcher and Junior at Purdue majoring in Computer Engineering. I'm currently working on foundational models, ML compiler optimizations, knowledge graphs, and applied AI. My research is concentrated in AI security, multi-agent collaboration, and multi-objective post-training. Outside of engineering, I enjoy playing basketball, lifting weights, and following Formula 1.

Experience

Research Engineering Intern

San Francisco, CA
May 2026 to Aug 2026
  • Built lifecycle hooks, heartbeats, distributed tracing, and observability into the platform orchestrating Rox's production agent swarms, running on Temporal, AWS, Docker, and Kubernetes.
  • Rebuilt the agentic retrieval layer over the production CRM, turning a relational schema into a knowledge graph. Authored an OWL ontology and OBDA mappings with Ontop, rewriting agent-issued SPARQL into SQL over Snowflake so agents traverse stored edges instead of inferring relationships foreign keys never captured.
  • Curated a benchmark of natural-language CRM questions and ran both retrieval layers behind an identical agent loop over MCP servers, across 8 model families from 27B to 1.6T parameters. Graph retrieval raised agent accuracy from 28.8% to 97.3% while cutting tokens 37%, tool calls 42%, and cost 39%; a 27B model on the graph beat a 1.6T model on tables.

Applied ML Engineer Intern

Bangalore, India
Jun 2025 to Aug 2025
  • Shipped a containerized service turning plain-English system descriptions into enterprise architecture diagrams, collapsing a manual design task from hours to under 30 seconds.
  • Built an extraction agent pulling GST and tariff schedules off Indian government portals and returning them as structured records, eliminating manual lookup for the tax practice.
  • Rebuilt the search layer behind Business Blueprint documents, pairing keyword and semantic retrieval over prior engagements so drafts assemble in under an hour instead of a week.

ML Compiler Engineer

West Lafayette, IN
Aug 2026 to Present
  • Building a custom compiler stack extending PPCI (Pure Python Compiler Infrastructure) to lower, optimize, and compile PyTorch models for inference on SoCET's custom Atalla tile-based AI accelerator.
  • Architecting backend instruction-level parallelism (ILP) discovery, hazard detection, and VLIW (Very Long Instruction Word) packetization, offloading control-flow and dependency resolution from silicon to the compiler to minimize hardware area and complexity.
  • Implementing compile-time memory planning and execution scheduling across DRAM and scratchpad memory, generating deterministic SDMA transfers and kernel mappings for compute-heavy workloads like GEMMs and convolutions.

Research

Undergraduate Researcher

West Lafayette, IN
Aug 2026 to Present
  • Building the AI software stack vulnerabilities graph in SecureChain, an NSF-funded knowledge graph selected as one of 10 datasets for NSF's National AI Research Resource pilot, modeling packages, model weights, LoRA adapters, training datasets, RAG corpora, vector stores, prompts, tool definitions, MCP servers, and agents as typed components.
  • Built the pipeline populating it from public security literature, including GitHub advisories, huntr bounties, and vendor threat research, routing structured advisories to a deterministic parser and prose to schema-constrained LLM extraction, with source-span verification and entity resolution before any write.

Undergraduate Researcher

West Lafayette, IN
Jan 2026 to May 2026
  • Led framework evaluation for SysLLMatic, an RL-based post-training framework that aligns code models toward efficiency via DPO over 88K+ C++ preference pairs, optimizing runtime, memory, CPU cycles, throughput, and energy simultaneously rather than one metric at a time.
  • Identified and curated benchmark datasets spanning program classes, workloads, and computing metrics to test whether the aligned policy generalized past its original single-dataset scope.
  • The aligned policy delivered up to 39.5% CPU-cycle reduction and 1.15x speedups on held-out C++ programs while preserving semantics.

Selected projects

A few recent explorations

MCPAegis

Static & Dynamic Security Scanner for Local MCP Servers

A CLI and terminal UI security auditor for local Model Context Protocol (MCP) servers. Combines dual-engine static analysis (Semgrep AST/taint analysis and LLM-powered tool poisoning/shadowing detection across W1 to W10 vulnerability taxonomies) with dynamic execution analysis inside a Lima VM sandbox. Uses eBPF kernel tracing across cgroups to monitor file, process, and network syscalls, detecting hidden privileges, tool hijacks, and leaking environment/file canaries in JSON-RPC responses.

PebbleGPT

Small Language Model Pretraining for $60

Pretrained a 320M-parameter transformer on 10.4B tokens using GQA, SwiGLU, RoPE, and a WSD learning rate schedule, for about $50 on a rented H100. Diagnosed weak performance on PIQA and ARC-easy and ran a targeted $1 mid-training pass mixing replay data with reasoning-focused sources, raising PIQA from 55.5 to 67.7 and ARC-easy from 37.7 to 56.4. Fine-tuned on SmolTalk for a total cost of $60, beating GPT-2 on ARC-easy and ARC-challenge at a comparable token budget.

Sift

Multimodal Local Search Engine

A high-performance local retrieval engine for instant semantic search across text, images, audio, and video. Backbone is Qwen3-VL-Embedding-2B, mapping all modalities into a unified 2048-dim vector space. Audio is handled via a CLAP-to-Qwen adapter, a learned 2-layer MLP trained with contrastive InfoNCE loss on AudioSetCaps. A filesystem watchdog daemon auto-indexes files using BLAKE3 change detection, and results are bundled via hybrid scoring combining embedding similarity, temporal proximity, and filename Jaccard.

KernelFusion

Custom CUDA + Triton Benchmarking

A GPU kernel fusion study, fusing element-wise Add and ReLU into a single kernel to eliminate the global memory round-trip between operations. Benchmarked custom CUDA, Triton, and torch.compile on NVIDIA Nsight Systems. Profiling showed torch.compile via Triton reads inputs once into SRAM, computes add and clamp, and writes once to VRAM, rivaling hand-written CUDA while bypassing the memory bandwidth bottleneck entirely.

Glimpse

AI Newsletter Digest SaaS

A full-stack SaaS that ingests Gmail newsletters and delivers a single AI-generated daily digest with audio playback. Celery orchestrates parallel summarization, processing multiple newsletters concurrently before synthesizing them into a cohesive narrative. Shipped with ElevenLabs TTS, daily email delivery, and 23+ production deploys.

Contact